meeting in Paris
Apr. 17th, 2007 09:23 am![[personal profile]](https://www.dreamwidth.org/img/silk/identity/user.png){kind=small}
izardAt last I've understood how Reservation Station works. It's a great experience when there are two CPU architects in the room answering questions. Unfortunately, I cannot publish 99% of the answers in the post. From the remaining 1%, I've solved a simple misunderstanding I had:
5Ghz processor means ~2cm length of maximum signal propagation within the die in single clock cycle, it looks first that 2cm is a lot, because the maximum die size is (unless this is Itanium or Power5) less. The answer is simple: signals in the die do not usually go by straight routes :)
It's interesting that an inner complexity of a small part of a silicon is comparable to one of a rocket, nuclear reactor or The Bomb, and the full technology cycle used to mass produce those belong to several private corporations, not government institutions like it is the case with 20th centuries wonders.
5Ghz processor means ~2cm length of maximum signal propagation within the die in single clock cycle, it looks first that 2cm is a lot, because the maximum die size is (unless this is Itanium or Power5) less. The answer is simple: signals in the die do not usually go by straight routes :)
It's interesting that an inner complexity of a small part of a silicon is comparable to one of a rocket, nuclear reactor or The Bomb, and the full technology cycle used to mass produce those belong to several private corporations, not government institutions like it is the case with 20th centuries wonders.
