Jan. 26th, 2011

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Just finished writing a test case for Linux that shows that multiple writes to PCI memory on devices connected to ICH9 on Montevina platform may lead to disruption of timer (int 16) interrupt delivery. First I've developed a huge and buggy patch for kernel that manifests this bug but finally squeezed this functionality to only 20 lines of user mode C and 5 lines shell script.

Looks like it is a hardware bug, as it is reproducible in multiple OSes. It's good however that on any modern platform I cannot reproduce this issue. Still Intel has 7 years support guarantee for platforms included to embedded roadmap, and I am one of those who some times gets this kind of work.

Now will switch on refining a demo for MWC. Hope to go there in 3 weeks, may be I'll have some time to see Barcelona rather then standing on a booth 9 hours a day. Likely will have to do both actually.

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